Rancang bangun Arithmetic Logic Unit 8 bit pada Spartan 2 field programmable gate array

Denny Dermawan, Maesa Agny Manggala Putra, Catur Budi Waluyo, Bambang Sudibya

Abstract


As we know, digital systems have been used in everyday life or in industry today because they are more useful than analog systems. Because it is important to develop digital systems, many new digital devices have been designed in complex ways. Some of these devices are called microprocessors, microcontrollers or microchips. It is very important to have very high speed performance in all devices. In this study, a tool was designed, namely, the Arichmetic Logic Unit or it can be called ALU. An important part of Field Programmable Gate Arrays or also known as FPGA, ALU generally has functions to perform arithmetic and logic calculations. Based on the results of the testing of the tools that have been carried out, it can be concluded that the design of the Arichmetic Logic Unit on the Spartan 2 FPGA. with the arithmetic operations performed are the ADDER (A + B) and SUBTRACTOR (A - B) operations, the logical operations performed are the OR (A OR B) and AND (A AND B) operations. It has been simulated and implemented with results that match the specifications of the design.



Keywords


Arichmetic Logic Unit 8 bit, Adder, Subtractor, AND, OR, Spartan 2 FPGA.

References


Rizki Jumadil Putra (2013) “Implementasi Filter Digital FIR (Finite Impulse Response) Pada Field Programmable Gate Arrays (FPGA)”.

L.Hermanto (2012) “Implementasi Serial Multiplexer 8 Bit Ke Dalam IC FPGA Sebagai Pendukung Percepatan Operasi Perkalian Dalam Kompresi Citra”.

Adi Setiawan (2015) “Pengali Pada SPARTAN - 2 FPGA Sebagai Pendukung Tapis Digital Pada Radio Detection Finder (RDF)”.

Ashari, Mochamad. 2012. Sistem Konverter DC (Desain Rangkaian Elektronika Daya). Surabaya: ITSpress.

Dermawan D. dkk, 2018, “Implementasi pengali pada Spartan 2 FPGA sebagai pendukung tapis digital pada Radio Direction Finding (RDF)”, Prosiding Nasional : Rekayasa Teknologi Industri dan Informasi (ReTII) ke-14; STTNAS Yogyakarta; ISSN 1907-5995; Hal 296 – 305; 4 November 2019.

Lakadiwala U et al, 2016,” Implementation of ALU on FPGA”, International Research Journal of Engineering and Technology (IRJET)Vol 3. Issue 4.

M. Morris Mano, “Digital Design” (3rd Edition), Prentice Hall.

M. Morris Mano & C. Kime, “Logic and Computer Design Fundamentals” Prentice Hall.

Kevin Skahill, “VHDL for Programmable Logic”, Addison Wesley & Sons.

Stefan Sjoholm & L. Lindh, “VHDL for Designers” Prentice Hall.

Swamynathan S.M, Banuvathi V., 2017,”Design and Analysis of FPGA based on 32 bit ALU using reversible gates”, IEEE International conference on Electrical, Instrumentation and Communication Engineering.

Widodo Budihartato dan Sigit Firmansyah. 2005. “Elektronika Digital dan Mikroprosesor”. Yogyakarta: ANDI.

Xilinx FPGA Ise Webpack 10.1 Tutorial.




DOI: http://dx.doi.org/10.28989/senatik.v6i0.423

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